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Jeroen W. Pluimers on .NET, C#, Delphi, databases, and personal interests

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Raymond Chen on The AArch64 processor (aka arm64) in many parts

Posted by jpluimers on 2025/01/14

For my link archive: below a series of articles my Raymond Chen on “The AArch64 processor (aka arm64)” in the order of appearance from a few years back and still very relevant today.

It is part of a few more series on processors that (were) supported by Windows. A good reference to find which version supported which processor architecture is the tables in List of Microsoft Windows versions – Wikipedia.

  1. [Wayback/Archive] The AArch64 processor (aka arm64), part 1: Introduction – The Old New Thing
  2. [Wayback/Archive] The AArch64 processor (aka arm64), part 2: Extended register operations – The Old New Thing
  3. [Wayback/Archive] The AArch64 processor (aka arm64), part 3: Addressing modes – The Old New Thing
  4. [Wayback/Archive] The AArch64 processor (aka arm64), part 4: Addition and subtraction – The Old New Thing
  5. [Wayback/Archive] The AArch64 processor (aka arm64), part 5: Multiplication and division – The Old New Thing
  6. [Wayback/Archive] The AArch64 processor (aka arm64), part 6: Bitwise operations – The Old New Thing
  7. [Wayback/Archive] The AArch64 processor (aka arm64), part 7: Bitfield manipulation – The Old New Thing
  8. [Wayback/Archive] The AArch64 processor (aka arm64), part 8: Bit shifting and rotation – The Old New Thing
  9. [Wayback/Archive] The AArch64 processor (aka arm64), part 9: Sign and zero extension – The Old New Thing
  10. [Wayback/Archive] The AArch64 processor (aka arm64), part 10: Loading constants – The Old New Thing
  11. [Wayback/Archive] The AArch64 processor (aka arm64), part 11: Loading addresses – The Old New Thing
  12. [Wayback/Archive] The AArch64 processor (aka arm64), part 12: Memory access and alignment – The Old New Thing
  13. [Wayback/Archive] The AArch64 processor (aka arm64), part 13: Atomic access – The Old New Thing
  14. [Wayback/Archive] The AArch64 processor (aka arm64), part 14: Barriers – The Old New Thing
  15. [Wayback/Archive] The AArch64 processor (aka arm64), part 15: Control transfer – The Old New Thing
  16. [Wayback/Archive] The AArch64 processor (aka arm64), part 16: Conditional execution – The Old New Thing
  17. [Wayback/Archive] The AArch64 processor (aka arm64), part 17: Manipulating flags – The Old New Thing
  18. [Wayback/Archive] The AArch64 processor (aka arm64), part 18: Return address protection – The Old New Thing
  19. [Wayback/Archive] The AArch64 processor (aka arm64), part 19: Miscellaneous instructions – The Old New Thing
  20. [Wayback/Archive] The AArch64 processor (aka arm64), part 20: The classic calling convention – The Old New Thing
  21. [Wayback/Archive] The AArch64 processor (aka arm64), part 21: Classic function prologues and epilogues – The Old New Thing
  22. [Wayback/Archive] The AArch64 processor (aka arm64), part 22: Other kinds of classic prologues and epilogues – The Old New Thing
  23. [Wayback/Archive] The AArch64 processor (aka arm64), part 23: Common patterns – The Old New Thing
  24. [Wayback/Archive] The AArch64 processor (aka arm64), part 24: Code walkthrough – The Old New Thing
  25. [Wayback/Archive] The AArch64 processor (aka arm64), part 25: The ARM64EC ABI – The Old New Thing

While archiving them, I found out both the Wayback Machine and Archive.is would save them very quickly meaning they are very lightweight pages. I like that!

In the past, The Old New Thing had other series on processors as well, for instance the i386 also known as x86-32 (some wrongly name it x32) in 2019:

  1. [Wayback/Archive] The Intel 80386, part 1: Introduction – The Old New Thing
  2. [Wayback/Archive] The Intel 80386, part 2: Memory addressing modes – The Old New Thing
  3. [Wayback/Archive] The Intel 80386, part 3: Flags and condition codes – The Old New Thing
  4. [Wayback/Archive] The Intel 80386, part 4: Arithmetic – The Old New Thing
  5. [Wayback/Archive] The Intel 80386, part 5: Logical operations – The Old New Thing
  6. [Wayback/Archive] The Intel 80386, part 6: Data transfer instructions – The Old New Thing
  7. [Wayback/Archive] The Intel 80386, part 7: Conditional instructions and control transfer – The Old New Thing
  8. [Wayback/Archive] The Intel 80386, part 8: Block operations – The Old New Thing
  9. [Wayback/Archive] The Intel 80386, part 9: Stack frame instructions – The Old New Thing
  10. [Wayback/Archive] The Intel 80386, part 10: Atomic operations and memory alignment – The Old New Thing
  11. [Wayback/Archive] The Intel 80386, part 11: The TEB – The Old New Thing
  12. [Wayback/Archive] The Intel 80386, part 12: The stuff you don’t need to know – The Old New Thing
  13. [Wayback/Archive] The Intel 80386, part 13: Calling conventions – The Old New Thing
  14. [Wayback/Archive] The Intel 80386, part 14: Rescuing a stack trace after the debugger gave up when it reached an FPO function – The Old New Thing
  15. [Wayback/Archive] The Intel 80386, part 15: Common compiler-generated code sequences – The Old New Thing
  16. [Wayback/Archive] The Intel 80386, part 16: Code walkthrough – The Old New Thing
  17. [Wayback/Archive] The Intel 80386, part 17: Future developments – The Old New Thing

After the arm64 series, Raymond did a small series on x86-64 (do not wrongly name it x64!):

  1. [Wayback/Archive] The x86-64 processor (aka amd64, x64): Whirlwind tour – The Old New Thing

Longer ago, in 2017, Raymond did a series on DEC Alpha (formerly Alpha AXP):

  1. [Wayback/Archive] The Alpha AXP, part 1: Initial plunge – The Old New Thing
  2. [Wayback/Archive] The Alpha AXP, part 2: Integer calculations – The Old New Thing
  3. [Wayback/Archive] The Alpha AXP, part 3: Integer constants – The Old New Thing
  4. [Wayback/Archive] The Alpha AXP, part 4: Bit 15. Ugh. Bit 15. – The Old New Thing (not in the Read next list of the prior 2 articles)
  5. [Wayback/Archive] The Alpha AXP, part 5: Conditional operations and control flow – The Old New Thing
  6. [Wayback/Archive] The Alpha AXP, part 6: Memory access, basics – The Old New Thing
  7. [Wayback/Archive] The Alpha AXP, part 7: Memory access, loading unaligned data – The Old New Thing

Even longer ago, in 2015, he also covered Itanium and IA-64 instruction set:

  1. [Wayback/Archive] The Itanium processor, part 1: Warming up – The Old New Thing
  2. [Wayback/Archive] The Itanium processor, part 2: Instruction encoding, templates, and stops – The Old New Thing
  3. [Wayback/Archive] The Itanium processor, part 3: The Windows calling convention, how parameters are passed – The Old New Thing
  4. [Wayback/Archive] The Itanium processor, part 4: The Windows calling convention, leaf functions – The Old New Thing
  5. [Wayback/Archive] The Itanium processor, part 5: The GP register, calling functions, and function pointers – The Old New Thing
  6. [Wayback/Archive] The Itanium processor, part 6: Calculating conditionals – The Old New Thing
  7. [Wayback/Archive] The Itanium processor, part 7: Speculative loads – The Old New Thing
  8. [Wayback/Archive] The Itanium processor, part 8: Advanced loads – The Old New Thing
  9. [Wayback/Archive] The Itanium processor, part 9: Counted loops and loop pipelining – The Old New Thing
  10. [Wayback/Archive] The Itanium processor, part 10: Register rotation – The Old New Thing

Back then, for ARM he deferred in [Wayback/Archive] The ARM processor architecture: Somebody else’s introduction – The Old New Thing to these (the links in The Old New Thing fail, those links have not been archived in either the Wayback Machine or Archive.is, but I found back the below ones when they first had appeared and amended them with the current ones as of writing):

  1. [Wayback/Archive] Understanding ARM Assembly Part 1 – Ntdebugging Blog – Site Home – MSDN Blogs (Processor features.)

    Windows has ran on a variety of processors in the past.  Those include i860, Alpha, MIPS, Fairchild Clipper, PowerPC, Itanium, SPARC, 286, 386, IA-32, x86, x64, and the newest one is ARM.  Most of these processors are antiquated now.

  2. [Wayback/Archive] Understanding ARM Assembly Part 2 – Ntdebugging Blog – Site Home – MSDN Blogs (How Windows uses the processor.)
  3. [Wayback/Archive] Understanding ARM Assembly Part 3 – Ntdebugging Blog – Site Home – MSDN Blogs (Calling conventions.)

I didn’t even know Windows had been running on i860, MIPS, Fairchild Clipper and SPARC, but knew about the other architectures. I’m especially familiar with the big steps between i186 and i286 (hello protected mode, A20 gate days and high memory area!), 386 (hello virtual 8086 mode), i586 (hello Pentium FDIV bug!) and on.

It made me search for earlier processor coverage by Raymond and yes, I missed a few namely MIPS in spring 2018

  1. [Wayback/Archive] The MIPS R4000, part 1: Introduction – The Old New Thing
  2. [Wayback/Archive] The MIPS R4000, part 2: 32-bit integer calculations – The Old New Thing
  3. [Wayback/Archive] The MIPS R4000, part 3: Multiplication, division, and the temperamental HI and LO registers – The Old New Thing
  4. [Wayback/Archive] The MIPS R4000, part 4: Constants – The Old New Thing
  5. [Wayback/Archive] The MIPS R4000, part 5: Memory access (aligned) – The Old New Thing
  6. [Wayback/Archive] The MIPS R4000, part 6: Memory access (unaligned) – The Old New Thing
  7. [Wayback/Archive] The MIPS R4000, part 7: Memory access (atomic) – The Old New Thing
  8. [Wayback/Archive] The MIPS R4000, part 8: Control transfer – The Old New Thing
  9. [Wayback/Archive] The MIPS R4000, part 9: Branch delay slot parlor tricks – The Old New Thing
  10. [Wayback/Archive] The MIPS R4000, part 10: Trampolines and stubs – The Old New Thing
  11. [Wayback/Archive] The MIPS R4000, part 11: More on branch delay slots – The Old New Thing
  12. [Wayback/Archive] The MIPS R4000, part 12: Calling convention – The Old New Thing
  13. [Wayback/Archive] The MIPS R4000, part 13: Function prologues and epilogues – The Old New Thing
  14. [Wayback/Archive] The MIPS R4000, part 14: Common patterns – The Old New Thing
  15. [Wayback/Archive] The MIPS R4000, part 15: Code walkthrough – The Old New Thing

and PowerPC in fall 2018:

  1. [Wayback/Archive] The PowerPC 600 series, part 1: Introduction – The Old New Thing
  2. [Wayback/Archive] The PowerPC 600 series, part 2: Condition registers and the integer exception register – The Old New Thing
  3. [Wayback/Archive] The PowerPC 600 series, part 3: Arithmetic – The Old New Thing
  4. [Wayback/Archive] The PowerPC 600 series, part 4: Bitwise operations and constants – The Old New Thing
  5. [Wayback/Archive] The PowerPC 600 series, part 5: Rotates and shifts – The Old New Thing
  6. [Wayback/Archive] The PowerPC 600 series, part 6: Memory access – The Old New Thing
  7. [Wayback/Archive] The PowerPC 600 series, part 7: Atomic memory access and cache coherency – The Old New Thing
  8. [Wayback/Archive] The PowerPC 600 series, part 8: Control transfer – The Old New Thing
  9. [Wayback/Archive] The PowerPC 600 series, part 9: The table of contents – The Old New Thing
  10. [Wayback/Archive] The PowerPC 600 series, part 10: Passing parameters, function prologues and epilogues – The Old New Thing
  11. [Wayback/Archive] The PowerPC 600 series, part 11: Glue routines – The Old New Thing
  12. [Wayback/Archive] The PowerPC 600 series, part 12: Leaf functions – The Old New Thing
  13. [Wayback/Archive] The PowerPC 600 series, part 13: Common patterns – The Old New Thing
  14. [Wayback/Archive] The PowerPC 600 series, part 14: Code walkthrough – The Old New Thing

--jeroen

This entry was posted on 2025/01/14 at 12:00 and is filed under AArch64/arm64, ARM, Assembly Language, Development, History, MIPS R4000, PowerPC, Software Development, The Old New Thing, Windows Development, x64, x86. You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.

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